For software debugging in an embedded application a trace flow is useful to determine which kind of events had taken place before a particular software problem arose. In general, a trace unit enables reconstruction of a monitored program flow. For these purposes a trace unit records trace data which is information about the running embedded application without halting its execution and stores the trace data sequentially, i.e. information about executed instructions is stored in the sequence of their execution.
A trace unit may record values of the instruction pointer (program counter) of a microprocessor and/or may record data accessed and processed, respectively, by a processor and/or the data flow on processor busses.
An instruction pointer (program counter) is a register in a computer processor which indicates where the computer is in its instruction sequence. Depending on the type of microprocessor, the instruction pointer comprises either the address of the instruction being executed or the address of the next address to be executed.
In general, the instruction pointer is automatically incremented for each instruction cycle so that instructions are normally retrieved sequentially from memory. However, certain instructions, such as branches and subroutine calls and returns, interrupt the sequence by placing a new value in the instruction pointer.
When tracing the instruction pointer, a trace unit continually receives so-called messages comprising compressed program flow information. Provided that the program flow is linear, a respective message comprises the number of executed linear program steps. If there is a branch in the program flow, the message will indicate a branch and, if required, the (relative) destination address of the branch.
Accordingly, the trace unit will receive about 2 bits of data per instruction which, depending on the clock rate of the traced processor, will amount to at least 100 MByte of trace data per second, roughly estimated.
For a trace of data accesses, compression is very limited. Thus, the trace unit will receive about 7 Bytes per access which, depending on the clock rate of the traced processor, will amount to several hundreds of MByte of trace data per second, roughly estimated.
Consequently, as the computing power and clock rate of modem processors increases more and more, also the amount of recorded trace data will further increase which involves very complex and die area consuming trace units, as, for example, a large trace buffer memory and a fast interface are required for managing this huge trace data volume.
Therefore, there exists a need for an apparatus and a method for tracing instruction pointers and/or data accesses in processor cores which allows a reduction of die area of trace units required for tracing instruction pointers and/or data accesses of processor cores and/or busses.